1. Field of the Invention
The present invention relates to a local area networking device, especially to a driving circuit for a transceiver output port of local area networking device.
2. Description of the Related Art
The IEEE announced an IEEE 802.3 standard for Ethernet communication system. According to the IEEE 802.3 standard, the transceiver output port of each local area networking device is coupled to other local area networking devices via a unshielded twisted pair (UTP) cable. The data outputted from the transceiver output port is in the form of a differential output signal. In a 10 Mbps Ethernet communication system, for example, the peak-to-peak magnitude of the differential output signal VPP is from ±2.2V to ±2.8V as illustrated in FIG. 1. The differential output signal of the transceiver output port 21 is transmitted to a twisted-pair cable 22 via the transformer 23, as illustrated in FIG. 2.
FIG. 3 shows a conventional circuit of a transceiver output port for communicating with the UTP cable. The circuit includes two current sources: I1 and I2, which are serially-connected to the resistors R1 and R2 respectively. The other ends of the resistors R1 and R2 are connected to a common supply voltage VDD. A differential voltage (V+−V−) appears between the nodes x and y, which have voltages V+ and V− respectively. An equivalent load resistance RL appears between the nodes x and y.
The advantage for the circuit as illustrated in FIG. 3 is that the power consumption of the circuit can be decreased when the circuit is in idle state. When there is no signal output from the transceiver output port (i.e., the transceiver output port is idle), the current sources I1, and I2 can be off in order to save the power consumption. However, due to the inductance of the transformer coil, it takes a period of time for the transformer coil to be fully charged every time after the current sources I1, and I2 are on. The time required is determined by the inductance of the transformer coil and the resistance of the resistors R1 and R2. Consequently, in order to reduce the time delay as mentioned in the above, the current sources I1, and I2 cannot be off even in idle state in practical application. That is, the magnitudes of the output currents of the current sources I1 and I2 cannot be zero even the transceiver is in idle state.
Although the power consumption of the conventional circuit as shown in FIG. 3 can be decreased, the power consumption is still considerably large since the magnitudes of the output currents of the current sources I1, and I2 must be large enough to drive the transceiver output port to output the differential output signal. Moreover, the conventional circuit is not applicable under low supply voltage, which is explained as follows. Referring to FIG. 3, RL is the equivalent load resistance of the UTP cable, and R1 and R2 are the impedance match resistors for matching the impedance of the UTP cable. According to IEEE 802.3 standard, RL=100 Ω and R1=R2=50 Ω. In the following explanation, the resistance of the resistors R1 and R2 are both represented by R and the resistance of RL can be represented by 2R. Accordingly, the following equations can be derived:
                                          I            1                    +                      I            2                          =        I                            (        1        )                                                                                    V                DD                            -                              V                -                                      R                    +                                                    V                +                            -                              V                -                                                    2              ⁢              R                                      =                  I          1                                    (        2        )                                                                                    V                DD                            -                              V                +                                      R                    ⁢                                                    V                +                            -                              V                -                                                    2              ⁢              R                                      =                  I          2                                    (        3        )            wherein I is a constant.
From the equations (2) and (3), equation (4) can be derived as follows:
                              ⇒                                                    2                ⁢                                  V                  DD                                            -                              (                                                      V                    +                                    +                                      V                    -                                                  )                                      R                          =                              I            ⁢                                                  ⇒                                          V                +                            +                              V                -                                              =                                                                      2                  ⁢                                      V                    DD                                                  -                RI                            ⁢                                                          ⇒                              V                -                                      =                                          2                ⁢                                  V                  DD                                            -              RI              -                              V                +                                                                        (        4        )            
Based on equation (2) and equation (4), equation (5) is generated as follows:
                              ⇒                                                    2                ⁢                                  V                  DD                                            -                              2                ⁢                                  (                                                            2                      ⁢                                              V                        DD                                                              -                    RI                    -                                          V                      +                                                        )                                            +                              V                +                            -                              (                                                      2                    ⁢                                          V                      DD                                                        -                  RI                  -                                      V                    +                                                  )                                                    2              ⁢              R                                      =                                            I              1                        ⁢                                                  ⇒                                                            -                  4                                ⁢                                  V                  DD                                            +                              4                ⁢                                  V                  +                                            +                              3                ⁢                RI                                              =                      2            ⁢                          RI              1                                                          (        5        )            
Based on equations (1) and (5), equation (6) is obtained to represent V+as follows:
                              ⇒                      V            +                          =                              V            DD                    -                                    1              4                        ⁢                          RI              1                                -                                    3              4                        ⁢                          RI              2                                                          (        6        )            
Furthermore, based on equations (4) and (6), equation (7) is obtained to represent V−as follows:
                              ⇒                      V            -                          =                              V            DD                    -                                    3              4                        ⁢                          RI              1                                -                                    1              4                        ⁢                          RI              2                                                          (        7        )            
The differential voltage (V+−V−) can then be represented by equation (8) according to equations (6) and (7) as follows:
                              ⇒                                    V              +                        -                          V              -                                      =                              R            2                    ⁢                      (                                          I                1                            -                              I                2                                      )                                              (        8        )            
In a 10 Mbps Ethernet communication system, for example, the peak-to-peak magnitude of the differential output signal VPP is from ±2.2V to ±2.8V. If the differential output signal VPP is positive (V+>V−), an inequality (9) can be derived from the equation (8):
                                          2.2            ≤                                          V                +                            -                              V                -                                              =                                                                      R                  2                                ⁢                                  (                                                            I                      1                                        -                                          I                      2                                                        )                                            ≤              2.8                        ⇒                                                  ⁢                                                            4.4                  R                                +                                  I                  2                                            ≤                              I                1                            ≤                                                5.6                  R                                +                                  I                  2                                                                    ,                            (        9        )            and another inequality (10) can be derived from equation (7):
                              V          -                =                                                            V                DD                            -                                                3                  4                                ⁢                                  RI                  1                                            -                                                1                  4                                ⁢                                  RI                  2                                                      ≥            0                    ⇒                                    V              DD                        ≥                                          R                4                            ⁢                              (                                                      3                    ⁢                                          I                      1                                                        +                                      I                    2                                                  )                                                                        (        10        )            
Based on inequalities (9) and (10), the following inequality can be obtained:
            V      DD        ≥                  R        4            ⁢              (                              3            ×                          4.4              R                                +                      3            ⁢                          I              2                                +                      I            2                          )              =      3.3    +          RI      2      
As a result, the supply voltage VDD has a minimum value of 3.3V when I2=0. Therefore, the supply voltage VDD cannot be further reduced if the same amplitude of the differential output signal is to be kept. In other words, the conventional circuit for a transceiver output port at least has the following disadvantages:
1. The power consumption to drive the transceiver output port is still considerably too large.
2. Magnitude of the supply voltage VDD must also be large. For example, in a 10 Mbps Ethernet communication system, the supply voltage VDD must be larger than 3.3V to maintain the magnitude of the differential output signal to be within a predetermined range.